Citation: | CAO Zhengcai, ZHAO Huidan, WANG Yongji, “ANFIS and SA Based Approach to Prediction, Scheduling, and Performance Evaluation for Semiconductor Wafer Fabrication,” Chinese Journal of Electronics, vol. 22, no. 1, pp. 25-30, 2013, |
Z.C. Cao, H.X. Yu, F. Qiao, “Petri-net and GA-based approachto modeling and optimize for semiconductor wafer fabrication”,Acta Electronica Sinica, Vol.38, No.2, pp.340-244, 2010. (inChinese)
|
T. Chen, “An optimized tailored nonlinear fluctuation smoothingrule for scheduling a semiconductor manufacturing factory”,Computers and Industrial Engineering, Vol.58, No.2, pp.317-325, 2010.
|
C.L Chen, “A heuristic model for justifying the acceptance ofrush orders in multi-plants manufacturing supply chain withoutsourcing”, Proceedings of 8th IEEE International Conferenceon Industrial Informatics, Osaka, pp.607-611, 2010.
|
C.Y.Wang, G.S. Liu, M.C. Chen et al., “A supply chain networksystem optimum model for rush orders production decision inglobal manufacturing”, Proceedings of 8th IEEE InternationalConference on Industrial Informatics, Osaka, pp.617-622, 2010.
|
Y.F. Lee, Z.B. Jiang, H.R. Liu, “Multiple-objective schedulingand real-time dispatching for the semiconductor manufacturingsystem”, Computers and Industrial Engineering, Vol.36, No.3,pp.866-884, 2009.
|
M. Liu, C. Wu, “Genetic algorithm using sequence rule chainfor multi-objective optimization in re-entrant micro-electronicproduction line”, Robotics and Computer-Integrated Manufacturing,Vol.20, No.3, pp.225-236, 2004.
|
Q. Kang, H. Xiao, L. Wang, “A swarm-dynamic schedulingmethod for semiconductor assembly production line”, Proceedingsof 4th IEEE Conference on Automation Science and Engineering,Washington, DC, pp.91-96, 2008.
|
K. Woo, S. Park, S. Fujimura, “Real-time buffer managementmethod for DBR scheduling”, International Journal of ManufacturingTechnology and Management, Vol.16, No.1-2, pp.42-57, 2009.
|
B. Naderi, R.T. Moghaddm, M. Khalili, “Electromagnetismlikemechanism and simulated annealing algorithms for flowshopscheduling problems minimizing the total weighted tardinessand makespan”, Knowledge-Based Systems, Vol.23, No.2,pp.77-85, 2010.
|
M. Liu, C. Wu, “Identical parallel machine scheduling problemfor minimizing the makespan using genetic algorithm combinedby simulated annealing”, Chinese Journal of Electronics, Vol.7,No.4, pp.317-321, 1998.
|
F.D. Chou, H.M. Wang, P.C. Chang, “A simulated annealingapproach with probability matrix for semiconductor dynamicscheduling problem”, Expert Systems with Applications, Vol.35,No.4, pp.1889-1898, 2008.
|