Citation: | DING Yi, HU Jianguo, DUAN Zhikui, et al., “Built-in ESD Protection for RFID Tag ICs,” Chinese Journal of Electronics, vol. 25, no. 6, pp. 1058-1062, 2016, doi: 10.1049/cje.2016.06.013 |
K. Finkenzeller, RFID handbook: Fundamentals and Applications in Contactless Smart Cards and Identification (Second Edition). John Wiley & Sons, 2003, pp.294
|
Hu Jianguo and Wu Shangzhi, "Low-power energy supply circuit for passive RFID transponder", 2009 IEEE International Conference on RFID, Orlando, FL, pp.1-6, 2009.
|
J.W. Lee, D.H.T. Vo, Q.H. Huynh, et al., "A fully integrated HF-band passive RFID tag IC using 0.18-CMOS technology for low-cost security applications", IEEE Transactions on Industrial Electronics, Vol.58, No.6, pp.2531-2540, 2011.
|
G.K. Balachandran and R.E. Barnett, "A 110 nA voltage regulator system with dynamic bandwidth boosting for RFID systems", IEEE Journal of Solid-State Circuits, Vol.41, No.9, pp.2019-2028, 2006.
|
V. Pillai, H. Heinrich, D. Dieska, P.V. Nikitin, R. Martinez, K.V.S. Rao, "An ultra-low-power long range battery/passive RFID tag for UHF and microwave bands with a current consumption of 700nA at 1.5V", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.54, No.7, pp.1500-1512, 2007.
|
W. Daoxun, J. Lingli, F. Hang, et al., "Analysis on the positive dependence of channel length on ESD failure current of a GGNMOS in a 5V CMOS", Journal of Semiconductors, Vol.34, No.2, pp.024004-5, 2013.
|
P. Hongwei, L. Siyang, S. Weifeng, "A novel latch-up free SCRLDMOS with high holding voltage for a power-rail ESD clamp", Journal of Semiconductors, Vol.34, No.1, pp.014007-5, 2013.
|
F. Hang, J. Lingli, Z. Bo, "A novel ESD protection structure for output pads", Journal of Semiconductors, Vol.34, No.11, pp.114016-4, 2013.
|
M.K. Khaw, et al., "Implementation of internal mixed signal ESD protection onto RFID transponder IC", IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, pp.901-905, 2006.
|
Ming-Hsien Tsai, et al., "An analog front-end circuit with dualdirectional SCR ESD protection for UHF-band passive RFID tag", 2011 IEEE International Conference on RFID, Orlando, FL, pp.142-145, 2011.
|
A. Boni, A. Facen, M. Bigi, "Multi-function ESD protection circuit for UHF RFID devices in CMOS technology", Electronics Letters, Vol.49, No.7, pp.453-455, 2013.
|
G. San Martin, P. Julian, P. Mandolesi, S. Martin, "RFID frontend in 0.5μm standard CMOS process: Experimental results", 2008 Argentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, pp.126-129, 2008.
|
A. Wang, X. Guan, S. Fan, et al., "ESD-protected power amplifier design in CMOS for highly reliable RF ICs", IEEE Transactions on Industrial Electronics, Vol.58, No.7, pp.2736-2743, 2011.
|
S.H. Chen, M.D. Ker, H.P. Hung, "Active ESD protection design for interface circuits between separated power domains against cross-power-domain ESD stresses", IEEE Transactions on Device and Materials Reliability, Vol.8, No.3, pp.549-560, 2008.
|
M.D. Ker, C.H. Chuang, W.Y. Lo, "ESD implantations for onchip ESD protection with layout consideration in 0.18-μm salicided CMOS technology", IEEE Transactions on Semiconductor Manufacturing, Vol.18, No.2, pp.328-337, 2005.
|
M. Scholz, Shih-Hung Chen, S. Thijs, D. Linten et al., "Systemlevel ESD protection design using On-wafer characterization and transient simulations", IEEE Transactions on Device and Materials Reliability, Vol.14, No.1, pp.104-111, 2014.
|