An Asynchronous Adaptive Priority Round-Robin Arbiter Based on Four-Phase Dual-rail Protocol

YANG Yintang; WU Ruizhen; ZHANG Li; ZHOU Duan

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Article Navigation > Chinese Journal of Electronics > 2015 > 24(1): 1-7

YANG Yintang, WU Ruizhen, ZHANG Li, et al., “An Asynchronous Adaptive Priority Round-Robin Arbiter Based on Four-Phase Dual-rail Protocol,” Chinese Journal of Electronics, vol. 24, no. 1, pp. 1-7, 2015,

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YANG Yintang, WU Ruizhen, ZHANG Li, et al., “An Asynchronous Adaptive Priority Round-Robin Arbiter Based on Four-Phase Dual-rail Protocol,” Chinese Journal of Electronics, vol. 24, no. 1, pp. 1-7, 2015,

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An Asynchronous Adaptive Priority Round-Robin Arbiter Based on Four-Phase Dual-rail Protocol

1.
School of Microelectronics, Xidian University, Xi'an 710071, China;
2.
School of Computer Science and Technology, Xidian University, Xi'an 710071, China

Funds: This work is supported by the National Natural Science Foundation of China (No.60725415, No.61172030, No.61474087).

More Information

Corresponding author: WU Ruizhen was born in Shaanxi Province, China. In 1986, he received B.E. degree in School of Microelectronics from Xidian University. He is currently a Ph.D. student in the School of Microelectronics at Xidian University. His research interests include SoC design and asynchronous circuits design. (Email: wuruizhen_1985@163.com)
Received Date: 2013-09-01
Rev Recd Date: 2014-04-01
Publish Date: 2015-01-10

Abstract

Abstract

An asynchronous Adaptive priority round-robin arbiter (APRA) based on four-phase dual-rail protocol is proposed. Combining the advantages of synchronous and asynchronous circuits, it provides the required bandwidth allocation on basis of arbitration fairness and works in synchronous SoC. In the Nonidling and nonpreemptive (NINP) model, simulations and verifications are made. The results show that the speed of the proposed arbiter is improved by 18%-50.4% and the dynamic and static power is reduced by 8.4%-46.2% and 81.8%-90.9% respectively compared with the commonly-used Fixed priority (FP), Round-Robin (RR) and Lottery arbiters. The proposed arbiter is better in output bandwidth allocation and it also has advantages in speed and power. Furthermore, it is easy in reconfiguration, strong in practicability and low in complexity of system integration and suits various extreme communication traffics.
- Arbiter,
- Asynchronous circuit,
- Four-phase dual-rail protocol,
- System-on-chip (SoC)

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References(19)

References

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