A Time-Area-Efficient and Compact ECSM Processor over GF(<i>p</i>)

HE Shiyang; LI Hui; LI Qingwen; LI Fenghua

doi:10.23919/cje.2022.00.267

Volume 32 Issue 6

Nov. 2023

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Article Navigation > Chinese Journal of Electronics > 2023 > 32(6): 1355-1366

HE Shiyang, LI Hui, LI Qingwen, et al., “A Time-Area-Efficient and Compact ECSM Processor over GF(p),” Chinese Journal of Electronics, vol. 32, no. 6, pp. 1355-1366, 2023, doi: 10.23919/cje.2022.00.267

Citation:

HE Shiyang, LI Hui, LI Qingwen, et al., “A Time-Area-Efficient and Compact ECSM Processor over GF(p),” Chinese Journal of Electronics, vol. 32, no. 6, pp. 1355-1366, 2023, doi: 10.23919/cje.2022.00.267

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A Time-Area-Efficient and Compact ECSM Processor over GF(p)

doi: 10.23919/cje.2022.00.267

HE Shiyang^1
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LI Hui^1
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LI Qingwen^1
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LI Fenghua^{1, 2
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1.
Xidian University, Xi’an 710126, China
2.
Chinese Academy of Sciences, Beijing 100093, China

Funds: This work was supported by the National Key R&D Program of China (2022YFB3103400), the National Natural Science Foundation of China (61732022), the Province Key R&D Program of Shaanxi (2019ZDLGY12-09), the Mobile Internet Security Innovation Team of Shaanxi Province (2018TD-007), and the China 111 Project (B16037).

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Author Bio:
Shiyang HE received the M.S. degree in telecommunications engineering from Xidian University, China, in 2016. He is currently working toward the Ph.D. degree at the School of Cyber Engineering, Xidian University, Xi’an, China. His research interests include cryptographic algorithm, hardware speedup and field-programmable gate array architectures and applications. (Email: syhe@xidian.edu.cn)

Hui LI (corresponding author) received the B.S. degree from Fudan University in 1990, M.S. and Ph.D. degrees from Xidian University in 1993 and 1998. Since June 2005, he has been a Professor in the School of Cyber Engineering, Xidian University, Xi’an, China. His research interests are in the areas of cryptography, wireless network security, information theory, hardware security, and network coding. He is a Chair of ACM SIGSAC China. He served as the Technique Committee Chair or Co-chair of several conferences. He has published more than 170 international academic research papers on information security and privacy preservation. (Email: lihui@mail.xidian.edu.cn)

Qingwen LI received the B.S. degree in information security from Xidian University, Xi’an, China, in 2022. She is currently working toward the M.S. degree at the School of Cyber Security, Xidian University, Xi’an, China. Her research interests include cryptographic algorithm. (Email: liqwww1017@163.com)

Fenghua LI received the B.S. degree in computer software, M.S. and Ph.D. degrees in computer systems architecture from Xidian University, Xi’an, China, in 1987, 1990, and 2009, respectively. He is currently a Professor and a Doctoral Supervisor with the State Key Laboratory of Information Security, Institute of Information Engineering, Chinese Academy of Sciences, Beijing, China. He is also a Doctoral Supervisor with the Xidian University. His research interests include network security, system security, privacy computing, and cryptographic processors. (Email: lfh@iie.ac.cn)
Received Date: 2022-08-09
Accepted Date: 2022-12-20

Available Online: 2023-01-18

Publish Date: 2023-11-05

Abstract

Abstract

The elliptic curve scalar multiplication (ECSM) is the core of elliptic curve cryptography (ECC), which directly determines the performance of ECC. In this paper, a novel time-area-efficient and compact design of a 256-bit ECSM processor over GF( p ) for the resource-constrained device is proposed, where p can be selected flexibly according to the application scenario. A compact and efficient 256-bit modular adder/subtractor and an improved 256-bit Montgomery multiplier are designed. We select Jacobian coordinates for point doubling and mixed Jacobian-affine coordinates for point addition. We have improved the binary expansion algorithm to reduce 75% of the point addition operations. The clock consumption of each module in this architecture is constant, which can effectively resist side-channel attacks. Reuse technology is adopted in this paper to make the overall architecture more compact and efficient. The design architecture is implemented on Xilinx Kintex-7 (XC7K325T-2FFG900I), consuming 1439 slices, 2 DSPs, and 2 BRAMs. It takes about 7.9 ms at the frequency of 222.2 MHz and 1763k clock cycles to complete once 256-bit ECSM operation over GF( p ).
- Elliptic curve encryption,
- Finite field,
- Montgomery multiplication,
- Field programmable gate array,
- Side-channel attacks

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References(26)

References

[1]	T. Elgamal, “A public key cryptosystem and a signature scheme based on discrete logarithms,” IEEE Transactions on Information Theory, vol.31, no.4, pp.469–472, 1985. doi: 10.1109/TIT.1985.1057074
[2]	N. Koblitz, “Elliptic curve cryptosystems,” Mathematics of Computation, vol.48, no.177, pp.203–209, 1987. doi: 10.1090/S0025-5718-1987-0866109-5
[3]	R. L. Rivest, A. Shamir, and L. Adleman, “A method for obtaining digital signatures and public-key cryptosystems,” Communications of the ACM, vol.21, no.2, pp.120–126, 1978. doi: 10.1145/359340.359342
[4]	J. Y. Lai and C. T. Huang, “A highly efficient cipher processor for dual-field elliptic curve cryptography,” IEEE Transactions on Circuits and Systems II:Express Briefs, vol.56, no.5, pp.394–398, 2009. doi: 10.1109/TCSII.2009.2019327
[5]	J. Y. Lai and C. T. Huang, “Elixir: High-throughput cost-effective dual-field processors and the design framework for elliptic curve cryptography,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.16, no.11, pp.1567–1580, 2008. doi: 10.1109/TVLSI.2008.2001239
[6]	C. Rebeiro and D. Mukhopadhyay, “High speed compact elliptic curve cryptoprocessor for FPGA platforms,” in Proceedings of the 9th International Conference on Cryptology in India, Kharagpur, India, pp.376–388, 2008.
[7]	N. Guillermin, “A high speed coprocessor for elliptic curve scalar multiplications over Fp,” in Proceedings of the 12th International Workshop on Cryptographic Hardware and Embedded Systems, Santa Barbara, CA, USA, pp.48–64, 2010.
[8]	J. Y. Lai, Y. S. Wang, and C. T. Huang, “High-performance architecture for elliptic curve cryptography over prime fields on FPGAs,” Interdisciplinary Information Sciences, vol.18, no.2, pp.167–173, 2012. doi: 10.4036/iis.2012.167
[9]	G. Chen, G. Q. Bai, and H. Y. Chen, “A high-performance elliptic curve cryptographic processor for general curves over GF(p) based on a systolic arithmetic unit,” IEEE Transactions on Circuits and Systems II:Express Briefs, vol.54, no.5, pp.412–416, 2007. doi: 10.1109/TCSII.2006.889459
[10]	J. F. Fan, K. Sakiyama, and I. Verbauwhede, “Elliptic curve cryptography on embedded multicore systems,” Design Automation for Embedded Systems, vol.12, no.3, pp.231–242, 2008. doi: 10.1007/s10617-008-9021-3
[11]	S. Ghosh, D. Mukhopadhyay, and D. Roychowdhury, “Petrel: Power and timing attack resistant elliptic curve scalar multiplier based on programmable GF(p) arithmetic unit,” IEEE Transactions on Circuits and Systems I:Regular Papers, vol.58, no.8, pp.1798–1812, 2011. doi: 10.1109/TCSI.2010.2103190
[12]	H. Marzouqi, M. Al-Qutayri, and K. Salah, “An FPGA implementation of NIST 256 prime field ECC processor,” in 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), Abu Dhabi, United Arab Emirates, pp.493–496, 2013.
[13]	C. J. McIvor, M. Mcloone, and J. V. Mccanny, “Hardware elliptic curve cryptographic processor over rmGF(p),” IEEE Transactions on Circuits and Systems I:Regular Papers, vol.53, no.9, pp.1946–1957, 2006. doi: 10.1109/TCSI.2006.880184
[14]	M. Machhout, Z. Guitouni, K. Torki, et al., “Coupled FPGA/ASIC implementation of elliptic curve crypto-processor,” International Journal of Network Security & its Applications, vol.2, no.2, pp.100–112, 2010.
[15]	T. Y. Li, F. Zhang, W. Guo, et al., “A survey: FPGA-based dynamic scheduling of hardware tasks,” Chinese Journal of Electronics, vol.30, no.6, pp.991–1007, 2021. doi: 10.1049/cje.2021.07.021
[16]	K. K. Wu, H. Y. Li, D. J. Zhu, et al., “Efficient solution to secure ECC against side-channel attacks,” Chinese Journal of Electronics, vol.20, no.3, pp.471–475, 2011.
[17]	P. C. Kocher, “Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems,” in Proceedings of the 16th Annual International Cryptology Conference, Santa Barbara, CA, USA, pp.104–113, 1996.
[18]	S. Hossain, Y. N. Kong, E. Saeedi, et al., “High-performance elliptic curve cryptography processor over NIST prime fields,” IET Computers & Digital Techniques, vol.11, no.1, pp.33–42, 2017. doi: 10.1049/iet-cdt.2016.0033
[19]	D. Amiet, A. Curiger, and P. Zbinden, “Flexible FPGA-based architectures for curve point multiplication over GF(p),” in Proceedings of the 2016 Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, pp.107–114, 2016.
[20]	M. D. Zhu, X. Qin, L. Wang, et al., “A time-to-digital-converter utilizing bits-counters to decode carry-chains and DSP48E1 slices in a field-programmable-gate-array,” Journal of Instrumentation, vol.16, no.2, 2021. doi: 10.1088/1748-0221/16/02/P02009
[21]	W. Yu, K. P. Wang, B. Li, et al., “Montgomery algorithm over a prime field,” Chinese Journal of Electronics, vol.28, no.1, pp.39–44, 2019. doi: 10.1049/cje.2018.11.006
[22]	G. Locke and P. Gallagher, FIPS PUB 186-3 Digital signature standard (DSS), Federal Information Processing Standards Publication, 2009, article no.186.
[23]	M. Islam, S. Hossain, M. K. Hasan, et al., “FPGA implementation of high-speed area-efficient processor for elliptic curve point multiplication over prime field,” IEEE Access, vol.7, pp.178811–178826, 2019. doi: 10.1109/ACCESS.2019.2958491
[24]	T. Kudithi and R. Sakthivel, “An efficient hardware implementation of the elliptic curve cryptographic processor over prime field,” International Journal of Circuit Theory and Applications, vol.48, no.8, pp.1256–1273, 2020. doi: 10.1002/cta.2759
[25]	T. Wu and R. M. Wang, “Fast unified elliptic curve point multiplication for NIST prime curves on FPGAS,” Journal of Cryptographic Engineering, vol.9, no.4, pp.401–410, 2019. doi: 10.1007/s13389-019-00211-9
[26]	S. Asif, S. Hossain, and Y. N. Kong, “High-throughput multi-key elliptic curve cryptosystem based on residue number system,” IET Computers & Digital Techniques, vol.11, no.5, pp.165–172, 2017. doi: 10.1049/iet-cdt.2016.0141