Volume 32 Issue 6
Nov.  2023
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ZHAO Wensheng, YUAN Mengjiao, WANG Xiang, et al., “Circuit Modeling and Performance Analysis of GNR@SWCNT Bundle Interconnects,” Chinese Journal of Electronics, vol. 32, no. 6, pp. 1271-1277, 2023, doi: 10.23919/cje.2021.00.379
Citation: ZHAO Wensheng, YUAN Mengjiao, WANG Xiang, et al., “Circuit Modeling and Performance Analysis of GNR@SWCNT Bundle Interconnects,” Chinese Journal of Electronics, vol. 32, no. 6, pp. 1271-1277, 2023, doi: 10.23919/cje.2021.00.379

Circuit Modeling and Performance Analysis of GNR@SWCNT Bundle Interconnects

doi: 10.23919/cje.2021.00.379
Funds:  This work was supported by the Zhejiang Provincial Natural Science Foundation of China (LXR22F040001).
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  • Author Bio:

    Wensheng ZHAO received the B.E. degree in electronic science and technology from Harbin Institute of Technology, Harbin, China, in 2008, and the Ph.D. degree from Zhejiang University, Hangzhou, China, in 2013. He is currently a Full Professor of Hangzhou Dianzi University, Hangzhou. His research interests include IC interconnect, advanced packaging, multiphysics, and microwave components. (Email: wshzhao@hdu.edu.cn)

    Mengjiao YUAN received the B.E. degree in electronic information science and technology from Henan University of Technology in 2019 and the M.E. degree from Hangzhou University of Electronic Science and Technology in 2022. Her research direction is based on the research of on-chip interconnection of carbon nano materials. (Email: 13939543987@163.com)

    Xiang WANG (corresponding author) is an Associate Professor with Hangzhou Dianzi University, Hangzhou, China. His research interests include IC interconnect modeling and simulation. (Email: wangxiang@hdu.edu.cn)

    Dawei WANG is an Associate Professor with Hangzhou Dianzi University, Hangzhou, China. His research interests include IC interconnect, multiphysics, and numerical algorithms. (Email: davidw.zoeq@hdu.edu.cn)

  • Received Date: 2021-11-01
  • Accepted Date: 2022-08-03
  • Available Online: 2023-02-17
  • Publish Date: 2023-11-05
  • In this paper, the single-walled carbon nanotube (SWCNT) with graphene nanoribbon (GNR) inside, namely GNR@SWCNT, is proposed as alternative conductor material for the interconnect applications. The equivalent circuit model is established, and the circuit parameters extracted analytically. By virtue of the equivalent circuit model, the signal transmission performance of GNR@SWCNT bundle interconnect is evaluated and compared with its Cu and SWCNT counterparts. The optimal repeater insertions in global- and intermediate-level GNR@SWCNT bundle interconnect are studied. Moreover, it is demonstrated that the GNR@SWCNT interconnects could provide superior performance, indicating that GNR@SWCNT structure would be beneficial for development of future carbon-based integrated circuits and systems.
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  • [1]
    J. Meindl, A. Naeemi, M. Bakir, et al., “Nanoelectronics in retrospect, prospect and principle,” in Proceedings of 2010 IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, pp.31–35, 2010.
    [2]
    A. Ceyhan and A. Naeemi, “Cu interconnect limitations and opportunities for SWNT interconnects at the end of the roadmap,” IEEE Transactions on Electron Devices, vol.60, no.1, pp.374–382, 2013. doi: 10.1109/TED.2012.2224663
    [3]
    J. D. Meindl, “Beyond Moore’s law: The interconnect era,” Computing in Science & Engineering, vol.5, no.1, pp.20–24, 2003. doi: 10.1109/MCISE.2003.1166548
    [4]
    C. Y. Ge, H. M. Yao, Y. H. Zhou, et al., “VLSI design for high-precision three-dimensional depth perception chip,” Chinese Journal of Electronics, vol.30, no.3, pp.556–560, 2021. doi: 10.1049/cje.2021.04.009
    [5]
    W. S. Zhao, G. F. Wang, L. L. Sun, et al., “Repeater insertion for carbon nanotube interconnects,” Micro & Nano Letters, vol.9, no.5, pp.337–339, 2014. doi: 10.1049/mnl.2014.0001
    [6]
    N. Srivastava, H. Li, F. Kreupl, et al., “On the applicability of single-walled carbon nanotubes as VLSI interconnects,” IEEE Transactions on Nanotechnology, vol.8, no.4, pp.542–559, 2009. doi: 10.1109/TNANO.2009.2013945
    [7]
    M. K. Majumder, B. K. Kaushik, and S. K. Manhas, “Analysis of delay and dynamic crosstalk in bundled carbon nanotube interconnects,” IEEE Transactions on Electromagnetic Compatibility, vol.56, no.6, pp.1666–1673, 2014. doi: 10.1109/TEMC.2014.2318017
    [8]
    A. Naeemi and J. D. Meindl, “Compact physics-based circuit models for graphene nanoribbon interconnects,” IEEE Transactions on Electron Devices, vol.56, no.9, pp.1822–1833, 2009. doi: 10.1109/TED.2009.2026122
    [9]
    A. Kumar and B. K. Kaushik, “Edge-roughness aware EM-RA model for signal integrity analysis in MLGNR interconnects,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol.11, no.2, pp.273–283, 2021. doi: 10.1109/TCPMT.2020.3043198
    [10]
    V. K. Nishad, A. K. Nishad, B. K. Kaushik, et al., “First-principle analysis of transition metal edge-passivated armchair graphene nanoribbons for nanoscale interconnects,” IEEE Transactions on Nanotechnology, vol.20, pp.92–98, 2021. doi: 10.1109/TNANO.2020.3048734
    [11]
    F. Liang, G. F. Wang, and W. Ding, “Estimation of time delay and repeater insertion in multiwall carbon nanotube interconnects,” IEEE Transactions on Electron Devices, vol.58, no.8, pp.2712–2720, 2011. doi: 10.1109/TED.2011.2154334
    [12]
    H. Kuzmany, L. Shi, M. Martinati, et al., “Well-defined sub-nanometer graphene ribbons synthesized inside carbon nanotubes,” Carbon, vol.171, pp.221–229, 2021. doi: 10.1016/j.carbon.2020.08.065
    [13]
    T. W. Chamberlain, J. Biskupek, G. A. Rance, et al., “Size, structure, and helical twist of graphene nanoribbons controlled by confinement in carbon nanotubes,” ACS Nano, vol.6, no.5, pp.3943–3953, 2012. doi: 10.1021/nn300137j
    [14]
    A. N. Khlobystov, “Carbon nanotubes: From nano test tube to nano-reactor,” ACS Nano, vol.5, no.12, pp.9306–9312, 2011. doi: 10.1021/nn204596p
    [15]
    H. E. Lim, Y. Miyata, R. Kitaura, et al., “Growth of carbon nanotubes via twisted graphene nanoribbons,” Nature Communications, vol.4, article no.3548, 2013. doi: 10.1038/ncomms3548
    [16]
    W. S. Zhao, P. W. Liu, H. Yu, et al., “Repeater insertion to reduce delay and power in copper and carbon nanotube-based nanointerconnects,” IEEE Access, vol.7, pp.13622–13633, 2019. doi: 10.1109/ACCESS.2019.2893960
    [17]
    Z. Z. Peng and D. L. Su, “Analytical models of passive linear structures in printed circuit boards,” Chinese Journal of Electronics, vol.30, no.2, pp.275–281, 2021. doi: 10.1049/cje.2020.08.017
    [18]
    International Technology Roadmap for Semiconductor (ITRS), Available at: http://www.itrs2.net/.
    [19]
    W. Steinhögl, G. Schindler, G. Steinlesberger, et al., “Comprehensive study of the resistivity of copper wires with lateral dimensions of 100 nm and smaller,” Journal of Applied Physics, vol.97, no.2, article no.023706, 2005. doi: 10.1063/1.1834982
    [20]
    A. Naeemi and J. D. Meindl, “Design and performance modeling for single-walled carbon nanotubes as local, semiglobal, and global interconnects in gigascale integrated systems,” IEEE Transactions on Electron Devices, vol.54, no.1, pp.26–37, 2007. doi: 10.1109/TED.2006.887210
    [21]
    A. Naeemi, R. Sarvari, and J. D. Meindl, “Performance modeling and optimization for single- and multi-wall carbon nanotube interconnects,” in Proceedings of the 44th Annual Design Automation Conference, San Diego, CA, USA, pp.568–573, 2007.
    [22]
    N. Srivastava and K. Banerjee, “Performance analysis of carbon nanotube interconnects for VLSI applications,” in Proceedings of IEEE/ACM International Conference on Computer-Aided Design, 2005, San Jose, CA, USA, pp.383–390, 2005.
    [23]
    A. Raychowdhury and K. Roy, “Modeling of metallic carbon-nanotube interconnects for circuit simulations and a comparison with Cu interconnects for scaled technologies,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.25, no.1, pp.58–65, 2006. doi: 10.1109/TCAD.2005.853702
    [24]
    M. P. Anantram and F. Léonard, “Physics of carbon nanotube electronic devices,” Reports on Progress in Physics, vol.69, no.3, pp.507–561, 2006. doi: 10.1088/0034-4885/69/3/R01
    [25]
    W. S. Zhao and W. Y. Yin, “Comparative study on multilayer graphene nanoribbon (MLGNR) interconnects,” IEEE Transactions on Electromagnetic Compatibility, vol.56, no.3, pp.638–645, 2014. doi: 10.1109/TEMC.2014.2301196
    [26]
    S. Das, S. Bhattacharya, D. Das, et al., “Modeling and analysis of electro-thermal impact of crosstalk induced gate oxide reliability in pristine and intercalation doped MLGNR interconnects,” IEEE Transactions on Device and Materials Reliability, vol.19, no.3, pp.543–550, 2019. doi: 10.1109/TDMR.2019.2933035
    [27]
    Y. I. Ismail and E. G. Friedman, “Effects of inductance on the propagation delay and repeater insertion in VLSI circuits,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.8, no.2, pp.195–206, 2000. doi: 10.1109/92.831439
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