Volume 30 Issue 1
Jan.  2021
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Article Contents
PENG Xiyuan, YU Jinxiang, YAO Bowen, et al., “A Review of FPGA-Based Custom Computing Architecture for Convolutional Neural Network Inference,” Chinese Journal of Electronics, vol. 30, no. 1, pp. 1-17, 2021, doi: 10.1049/cje.2020.11.002
Citation: PENG Xiyuan, YU Jinxiang, YAO Bowen, et al., “A Review of FPGA-Based Custom Computing Architecture for Convolutional Neural Network Inference,” Chinese Journal of Electronics, vol. 30, no. 1, pp. 1-17, 2021, doi: 10.1049/cje.2020.11.002

A Review of FPGA-Based Custom Computing Architecture for Convolutional Neural Network Inference

doi: 10.1049/cje.2020.11.002
Funds:

the National Natural Science Foundation of China 61803121

the Postdoctoral Science Foundation of China 2019M651277

More Information
  • Author Bio:

    PENG Xiyuan   received the B.S., M.S., and Ph.D. degrees from Harbin Institute of Technology, China, in 1984, 1987, and 1992, respectively. He is currently a Full Professor with the School of Electronics and Information Engineering, Harbin Institute of Technology. His current research interests include automatic test, and high performance computing. (Email: pxy@hit.edu.cn)

    YU Jinxiang   received the B.S. degree in measurement technology and instrumentation from Harbin Institute of Technology at Weihai, China, in 2015. He is currently pursuing the Ph.D. degree in the School of Electronics and Information Engineering, Harbin Institute of Technology, China. His current research interests include computer vision and high performance computing. (Email: yujinxiang@hit.edu.cn)

    YAO Bowen   received the B.S. degree in microelectronics and M.S. degree in electronics science and technology from Harbin University of Science and Technology, China, in 2015 and 2018. He is currently pursuing the Ph.D. degree in the School of Electronics and Information Engineering, Harbin Institute of Technology, China. His current research interests include domain-specific computing, customizable computing, reconfigurable computing, and co-designing efficient algorithms and hardware systems for machine learning. (Email: bwyao@hit.edu.cn)

    LIU Liansheng   received the B.S. degree in measurement technology and instrumentation from Harbin Institute of Technology, China, in 2006, M.S. and Ph.D. degrees in instrumentation science and technology both from Harbin Institute of Technology in 2008 and 2017, respectively. From Nov. 2012 to Nov. 2014, he studied at McGill University as a visiting Ph.D. student supported by China Scholarship Council. He is currently an associate professor at Harbin Institute of Technology. His research interests include prognostics and health management, anomaly sensor data detection, and cyber physical systems. (Email: lianshengliu@hit.edu.cn)

  • Corresponding author: PENG Yu  (corresponding author) received the B.S. degree in measurement technology and instrumentation and the M.S. and Ph.D. degrees in instrumentation science and technology from the Harbin Institute of Technology, China, in 1996, 1998, and 2004, respectively. He is currently a Full Professor with the School of Electronics and Information Engineering, Harbin Institute of Technology. His current research interests include automatic test technologies, virtual instruments, system health management, and reconfigurable computing. (Email: pengyu@hit.edu.cn)
  • Received Date: 2020-08-06
  • Accepted Date: 2020-09-26
  • Publish Date: 2021-01-01
  • Convolutional neural network (CNN) has been widely adopted in many tasks. Its inference process is usually applied on edge devices where the computing resources and power consumption are limited. At present, the performance of general processors cannot meet the requirement for CNN models with high computation complexity and large number of parameters. Field-programmable gate array (FPGA)-based custom computing architecture is a promising solution to further enhance the CNN inference performance. The software/hardware co-design can effectively reduce the computing overhead, and improve the inference performance while ensuring accuracy. In this paper, the mainstream methods of CNN structure design, hardware-oriented model compression and FPGA-based custom architecture design are summarized, and the improvement of CNN inference performance is demonstrated through an example. Challenges and possible research directions in the future are concluded to foster research efforts in this domain.
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