ZHANG Shuiping, TIAN Xin, XIONG Chengyi, et al., “Fast Implementation for the Singular Value and Eigenvalue Decomposition Based on FPGA,” Chinese Journal of Electronics, vol. 26, no. 1, pp. 132-136, 2017, doi: 10.1049/cje.2016.06.033
Citation: ZHANG Shuiping, TIAN Xin, XIONG Chengyi, et al., “Fast Implementation for the Singular Value and Eigenvalue Decomposition Based on FPGA,” Chinese Journal of Electronics, vol. 26, no. 1, pp. 132-136, 2017, doi: 10.1049/cje.2016.06.033

Fast Implementation for the Singular Value and Eigenvalue Decomposition Based on FPGA

doi: 10.1049/cje.2016.06.033
Funds:  This work is supported by the National Natural Science Foundation of China (No.61273279, No.61471400, No.61102064, No.61273241).
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  • Corresponding author: MING Delie (corresponding author) was born in Hubei Province, China, in 1974. He received the Ph.D. degree in School of Automation, Huazhong University of Science and Technology. His research interests include image analysis and computer vision. (Email:mingdelie@hust.edu.cn)
  • Received Date: 2014-12-01
  • Rev Recd Date: 2015-03-16
  • Publish Date: 2017-01-10
  • A fast and efficient hardware implementation for computing the Singular value decomposition (SVD) and Eigenvalue decomposition (EVD) is presented. Considering that the SVD and EVD are complex and expensive operations, to achieve high performance with low computing complexity, our approach takes full advantage of the combination of parallel and sequential computation, which can increase efficiently the hardware utilization. Besides, regarding to EVD, we propose a hardware solution of a simplified Coordinate rotation digital computer (CORDIC)-like algorithm which can obtain higher speed. The performance analysis and comparison results show that the proposed methods can be realized on Filed-programmable gate arrays (FPGAs) with less computation time by using systolic array. It will be shown that the proposed implementation could be an efficient alternative for real-time applications.
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