Volume 31 Issue 4
Jul.  2022
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YI Pinyun, ZHU Zhangming, XU Nuo, et al., “A Unity-Gain Buffer Assisted Noise-Shaping SAR ADC Based on Error-Feedback Structure,” Chinese Journal of Electronics, vol. 31, no. 4, pp. 658-664, 2022, doi: 10.1049/cje.2020.00.286
Citation: YI Pinyun, ZHU Zhangming, XU Nuo, et al., “A Unity-Gain Buffer Assisted Noise-Shaping SAR ADC Based on Error-Feedback Structure,” Chinese Journal of Electronics, vol. 31, no. 4, pp. 658-664, 2022, doi: 10.1049/cje.2020.00.286

A Unity-Gain Buffer Assisted Noise-Shaping SAR ADC Based on Error-Feedback Structure

doi: 10.1049/cje.2020.00.286
Funds:  This work was supported by the National Natural Science Foundation of China (61832007) and the Research Fundation from NUDT (ZK20-02)
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  • Author Bio:

    received the B.S. and M.S. degrees from Xidian University, Xi’an, China, in 2013 and 2016, respectively. She is currently working toward the Ph.D. degree at College of Computer, National University of Defense Technology, Changsha, China. Her current interests include SAR ADC and low power integrated circuits design. (Email: pinyunyi@163.com)

    received the M.S. and Ph.D. degrees in microelectronics from Xidian University, Xi’an, China, in 2001 and 2004, respectively. He is currently a Professor with the School of Microelectronics, Xidian University, Xi’an, China. His research interests include CMOS data converters and AFE, low power mixed-signal integrated circuits design, green-power ICs, and 3D-ICs based TSV.(Email: zhangmingzhu@xidian.edu.cn)

    (corresponding author) received the B.S. degree in microelectronics from Xidian University in 2012, and the Ph.D. degree in electronics science and technology from National University of Defense Technology (NUDT) in 2018. His current research interests include emerging non-volatile memory technologies and their employment in in-memory computation, and development of high-performance micro-processor chip. (Email: oun_ux@163.com)

    (corresponding author) was specialized in computer science and technology obtaining the M.E. and Ph.D. degrees from the National University of Defense Technology, China. He then worked as a Researcher in the Computer Science Department of NUDT. During 2005–2006, he joined the Max Planck Institute of Microstructure Physics as a Visiting Fellow. His research interests include nanoelectronics, quantum computation, and emerging nonvolatile memories. (Email: liangfang@nudt.edu.cn)

    was born in the city of Chongqing, China, in 1958. He received the Ph.D. degree from Xi’an Jiao tong University, Xi’an, China, in 1991. He is currently a Professor at State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, the School of Microelectronics, Xidian University, Xi’an, China. His research interests include wide forbidden band semiconductor materials and devices. (Email: yhao@xidian.edu.cn)

  • Received Date: 2020-09-06
  • Accepted Date: 2022-02-09
  • Available Online: 2022-03-07
  • Publish Date: 2022-07-05
  • The passive noise-shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC) demonstrates high performance in resolution improvement, power reduction, and process scaling, while its charge-sharing loss and limited bandwidth weaken the noise-shaping effect. This paper presents a first-order NS-SAR ADC based on error-feedback (EF) structure to realize high-efficiency noise shaping. It employs a lossless EF path by using a set of ping-pong switching capacitors with passive signal-residue summation technique. The proposed first-order EF NS-SAR prototype can be promoted to multi-order structure with the minor modification. Verified by simulation in 65-nm CMOS process, the proposed 9-bit NS-SAR ADC consumes 183.66 μ W when operating at 20 MS/s with the supply voltage of 1.2 V. At the oversampling ratio of 16, it achieves a peak signal-to-noise-and-distortion ratio of 81 dB, yielding Schreier figure of merit of 176.32 dB.
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