A 16-bit, ±10-V Input Range SAR ADC with a 5-V Supply Voltage and Mixed-Signal Nonlinearity Calibration

LUO Hongrui; ZHAO Xianlong; JIAO Zihao; ZHANG Jie; WANG Xiaofei; ZHANG Ruizhi; ZHANG Hong

doi:10.1049/cje.2021.00.057

Volume 31 Issue 4

Jul. 2022

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Article Navigation > Chinese Journal of Electronics > 2022 > 31(4): 690-697

LUO Hongrui, ZHAO Xianlong, JIAO Zihao, et al., “A 16-bit, ±10-V Input Range SAR ADC with a 5-V Supply Voltage and Mixed-Signal Nonlinearity Calibration,” Chinese Journal of Electronics, vol. 31, no. 4, pp. 690-697, 2022, doi: 10.1049/cje.2021.00.057

Citation:

LUO Hongrui, ZHAO Xianlong, JIAO Zihao, et al., “A 16-bit, ±10-V Input Range SAR ADC with a 5-V Supply Voltage and Mixed-Signal Nonlinearity Calibration,” Chinese Journal of Electronics, vol. 31, no. 4, pp. 690-697, 2022, doi: 10.1049/cje.2021.00.057

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A 16-bit, ±10-V Input Range SAR ADC with a 5-V Supply Voltage and Mixed-Signal Nonlinearity Calibration

doi: 10.1049/cje.2021.00.057

1.
School of Microelectronics, Xi’an Jiaotong University, Xi’an 710049, China
2.
Beijing Smartchip Microelectronics Company Limited, Beijing 100192, China

Funds: This work was supported by the National Natural Science Foundation of China (61974118, 62004156)

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Author Bio:
received the B.S. degree from Xi’an Jiaotong University, Xi’an, China, in 2016. Since Sept. 2016, he was studying for an M.S. degree from Xi’an Jiaotong University mainly in high-precision data converters and voltage reference circuits. Since Feb. 2019, he was studying for a Ph.D. degree with the Department of Microelectronics, Xi’an Jiaotong University. His research interests include high-precision SAR-ADC and mixed-signal IC design. (Email: luohongrui930705@stu.xjtu.edu.cn)

received the bachelor’s degree from the Hebei University of Technology, Tianjin, China, in 1996, and the master’s degree from North China Electric Power University, Beijing, China, in 1999. He is currently pursuing the Ph.D. degree with the School of Electronic Information, Wuhan University, Wuhan, China., His current research interests include wireless communication networks, data mining and large data analysis, power distribution technology, and power system communications. (Email: zhaoxianlong@sgitg.sgcc.com.cn)

received the B.S degree in microelectronics from Xi’an Jiaotong University, Xi’an, China, in 2017. He is currently pursuing the Ph.D. degree at School of Microelectronics, Xi’an Jiaotong University. His current research interests include mixed-signal IC design. (Email: jzh@aerosemi.com)

received the B.S. degree and Ph.D. degree in electronic engineering from Xi’an Jiaotong University, Xi’an, China, in 2010 and 2018, respectively. From 2018 to 2020, he was with Hisilicon Inc, China, where he designed analog integrated circuits for PMUs. Since March 2020, he has been an Assistant Professor with the School of Microelectronics, Xi’an Jiaotong University, Xi’an, China. His research interests include ADC and low power biomedical IC design. (Email: jiezhang@xjtu.edu.cn)

(corresponding author) received the B.S. and M.S. degrees from Xi’an Jiaotong University, Xi’an, China, in 2001 and 2006 respectively, and received the Ph.D. degree in electronic engineering from Xidian University, Xi’an, China, in 2016. He was with Beijing Shidai Minxin Technology Co., Ltd. from 2006 to 2009 as a Member of Technical Staff in the area of high-performance converters. From 2009 to 2011 he has been with Xi’an Leader-chip Technology Co., Ltd. where he is Technical Director for BMS IC. From 2011 to 2017, he has been with Xi’an Aerosemi Technology Co., Ltd., where he is Technical Director for BMS IC. Since 2017, he has been with the Department of Microelectronics at the Xi’an Jiaotong University, where he is currently an Associate Professor. (Email: mxfwang@xjtu.edu.cn)

received the B.S., M.S., and Ph.D. degrees from the Department of Electronic Engineering, Xi’an Jiaotong University, China, in 1982, 1987, and 1995, respectively. From 1982 to 1984, he joined the Semiconductor Research Center, Ministry of Electronic Industry of China, where he worked on the design and fabrication of MOSFET. From 1988 to present, he has been with the Department of Microelectronic of Xi’an Jiaotong University, where his currently a Professor. His current research focuses on design of low-power analog CMOS IC. Prof. Zhang Served as the Chair of the Department of Microelectronics, Xi’an Jiaotong University, from 2000 to 2015. He was also the recipient of several awards by the Ministry of Science and Technology and the Ministry of Education, China, from 1996 to 2005. (Email: rzzhang@xjtu.edu.cn)

received the B.S. degree in electronic engineering from Xi’an University of Technology in 2000, and the Ph.D. degree in electronic engineering from Xi’an Jiaotong University, Xi’an China, in 2008. Since 2008, he has been with the Department of Microelectronics at the Xi’an Jiaotong University, where he is currently a Professor. From June to September 2009, he was a Visiting Scholar at KU Leuven and IMEC, Belgium. From Aug. 2016 to Aug. 2017, he was a Visiting Professor in the Department of the Electrical and Computer Engineering, University of Toronto. His research interests include analog/mixed-signal IC design such as ADC, low-power and low voltage references, bio-medical ICs and so on. (Email: hongzhang@xjtu.edu.cn)
Received Date: 2021-02-03
Accepted Date: 2021-12-15

Available Online: 2022-02-16

Publish Date: 2022-07-05

Abstract

Abstract

This paper presents a high-precision, successive approximation register (SAR) analog-to-digital converter (ADC) with resistive analog front-end for low-voltage and wide input range applications. To suppress the serious nonlinearity brought by the voltage coefficients of analog front-end without deteriorating differential nonlinearity performance, a mixed-signal calibration scheme based on piecewise-linear method with calibration digital-to-analog converter is proposed. A compensation current is designed to sink or source from the reference to keep it independent of input signal, which greatly improves the linearity performance. Fabricated in a 0.5- μm CMOS process, the proposed ADC achieves 88-dB signal-to-noise-and-distortion ratio and 103-dB spurious free dynamic range with 5-V supply voltage and 2.5-V reference voltage, and the total power consumption is 37.5 mW.
- Wide input range,
- Resistive scaling front-end,
- Mixed-signal nonlinearity calibration,
- Precision,
- Successive approximation register (SAR),
- Current compensation circuit

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References(13)

References

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