Volume 30 Issue 6
Nov.  2021
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LI Tianyang, ZHANG Fan, GUO Wei, SUN Mingqian, CHEN Li. A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks[J]. Chinese Journal of Electronics, 2021, 30(6): 991-1007. doi: 10.1049/cje.2021.07.021
Citation: LI Tianyang, ZHANG Fan, GUO Wei, SUN Mingqian, CHEN Li. A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks[J]. Chinese Journal of Electronics, 2021, 30(6): 991-1007. doi: 10.1049/cje.2021.07.021

A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks

doi: 10.1049/cje.2021.07.021
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This work is supported by the National Natural Science Foundation of China (No.61521003).

  • Received Date: 2020-12-09
  • Rev Recd Date: 2021-04-07
  • Available Online: 2021-09-23
  • Publish Date: 2021-11-05
  • To meet the increasing computing needs of various application fields, Field programmable gate array (FPGA) has been widely deployed. In FPGA-based processing, hardware tasks can be better accelerated by allocating appropriate computing resources. Therefore, FPGA-based hardware task scheduling has become one of the mainstream research directions in academia and industry. However, the optimization objectives of existing FPGA-based hardware task scheduling methods are relatively scattered. In this regard, this paper summarizes the research status of hardware task dynamic scheduling from the three essential elements of FPGA processing:time, resources, and power consumption. This paper analyzes, sorts out, categorizes the ideas and implementations of various scheduling methods and analyzes and evaluates optimization effects of various scheduling methods from multiple dimensions. Then, the shortcomings of the existing methods are summarized and some practical applications are introduced. Finally, the research direction of task scheduling based on FPGA is prospected and summarized.
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