An Efficient and Fast Area Optimization Approach for Mixed Polarity Reed-Muller Logic Circuits

ZHOU Yuhao; HE Zhenxue; JIANG Jianhui; ZHAO Xiaojun; ZHANG Fan; XIAO Limin; WANG Xiang

doi:10.23919/cje.2022.00.407

Volume 33 Issue 5

Sep. 2024

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Article Navigation > Chinese Journal of Electronics > 2024 > 33(5): 1165-1180

Yuhao ZHOU, Zhenxue HE, Jianhui JIANG, et al., “An Efficient and Fast Area Optimization Approach for Mixed Polarity Reed-Muller Logic Circuits,” Chinese Journal of Electronics, vol. 33, no. 5, pp. 1165–1180, 2024 doi: 10.23919/cje.2022.00.407

Citation:

Yuhao ZHOU, Zhenxue HE, Jianhui JIANG, et al., “An Efficient and Fast Area Optimization Approach for Mixed Polarity Reed-Muller Logic Circuits,” Chinese Journal of Electronics, vol. 33, no. 5, pp. 1165–1180, 2024 doi: 10.23919/cje.2022.00.407

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An Efficient and Fast Area Optimization Approach for Mixed Polarity Reed-Muller Logic Circuits

doi: 10.23919/cje.2022.00.407

ZHOU Yuhao^1
,,
HE Zhenxue^{2
,
,},
JIANG Jianhui^1
,,
ZHAO Xiaojun^2
,,
ZHANG Fan^2
,,
XIAO Limin^3
,,
WANG Xiang^4
,

1.
School of Software Engineering, Tongji University, Shanghai 201804, China
2.
Key Laboratory of Agricultural Big Data of Hebei Province, Hebei Agricultural University, Baoding 071001, China
3.
School of Computer Science and Engineering, Beihang University, Beijing 100191, China
4.
School of Electronic and Information Engineering, Beihang University, Beijing 100191, China

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Author Bio:
Yuhao ZHOU is a Ph.D. candidate at the School of Software Engineering, Tongji University, Shanghai, China. He has authored some academic articles which have been published in refereed international journals, such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM Transactions on Design Automation of Electronic Systems, Applied Soft Computing, etc. His research interests include Reed-Muller circuits area optimization based on XNOR/OR, power optimization, low power integrated circuits (IC) design, computer aided design and intelligent optimization algorithm. (Email: zhouyuhao@tongji.edu.cn)

Zhenxue HE received the Ph.D. degree in computer architecture from Beihang University, Beijing, China, in 2018. He is currently a full Associate Professor with Hebei Agricultural University, Baoding, China. He has authored or coauthored more than 40 articles in peer-reviewed journals and proceedings, such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Services Computing, IEEE Sensors Journal, and Journal of Computer Science and Technology. His research interests include low power IC design and optimization, multiple-valued logic circuits, combinatorial optimization, and intelligent algorithm. (Email: hezhenxue@buaa.edu.cn)

Jianhui JIANG received the B.E., M.E., and Ph.D. degrees in traffic information engineering and control from Shanghai Tiedao University (in 2000, it was merged to Tongji University), Shanghai, China, in 1985, 1988, and 1999, respectively. During 1994–2000, he was an Associate Professor in computer science and technology at Shanghai Tiedao University. Since 2000, he has been a full Professor in computer science and technology at Tongji University, Shanghai, China. During 2007–2011, he was the Chair of the Department of Computer Science and Technology, Tongji University. Since 2011, he is the Associate Dean of the School of Software Engineering, Tongji University. He is the Vice Director of Technical Committee on Fault-tolerant Computing, CCF. He has served on several program committees of national or international symposiums or workshops. He has co-authored two books and published more than 200 technical papers. His current research interests include dependable systems and networks, software reliability engineering, and VLSI/SoC testing and fault-tolerance. He is a Senior Member of CCF. (Email: jhjiang@tongji.edu.cn)

Xiaojun ZHAO received the B.S. degree from Sichuan Normal University, Chengdu, China, in 2013, and received the M.S. degree from Xidian University, Xi’an, China, in 2016. She is currently a Lecturer at Hebei Agricultural University. Her research interests include electronics design automation, intelligent algorithm, signal detection, and data processing. (Email: jaja028@126.com)

Fan ZHANG received the Ph.D. degree in computer science from Hebei Agricultural University, Baoding, China, in 2013. She is currently a full Associate Professor with Hebei Agricultural University. She has authored or coauthored more than 20 articles in peer-reviewed journals and proceedings. Her research interests include low power IC design and optimization and agricultural informatization. (Email: ellenzhang0911@126.com)

Limin XIAO received the B.S. degree in computer science (major) and physics (minor) from the Department of Computer Science, Tsinghua University, Beijing, China, in 1993, and the M.S. and Ph.D. degrees in computer science from the Institute of Computer Science, Chinese Academy of Sciences, Beijing, China, in 1996 and 1998, respectively. He is currently a Professor with the School of Computer Science and Engineering, Beihang University, Beijing, China. He is a Senior Member of the Chinese Computer Society, the Director of the Institute of Computer System Architecture. His main research areas include computer architecture, computer system software, high-performance computing, virtualization, and cloud computing. He is a Senior Member of CCF and a Senior member of IEEE. (Email: 930111386@qq.com)

Xiang WANG received the Ph.D. degree in engineering from the School of Information Technology, Peking University, Beijing, China, in 2004. He is currently a Professor with the School of Electronic and Information Engineering, Beihang University, Beijing, China. He has served on the Editorial Boards of several international journals, such as IEEE Transactions on Very Large Scale Integration Systems, IEEE Transactions on Dependable and Secure Computing, Science China, Chinese Physics Letters, Journal of Semiconductor, and Journal of Electronics. He is currently a TPC Member of the IEEE Conference Organizing Committee, Vice Chairman of the Conference, and Chairman of the Conference. His main research areas include very large-scale integration, micro-nano systems, genetic circuits, and aerospace information networks. He is a Senior Member of IEEE. (Email: wxiang@buaa.edu.cn)
Corresponding author: Email: hezhenxue@buaa.edu.cn
Received Date: 2022-11-29
Accepted Date: 2023-03-22

Available Online: 2023-10-10

Publish Date: 2024-09-05

Abstract

Abstract

Area has become one of the main bottlenecks restricting the development of integrated circuits. The area optimization approaches of existing XNOR/OR-based mixed polarity Reed-Muller (MPRM) circuits have poor optimization effect and efficiency. Given that the area optimization of MPRM logic circuits is a combinatorial optimization problem, we propose a whole annealing adaptive bacterial foraging algorithm (WAA-BFA), which includes individual evolution based on Markov chain and Metropolis acceptance criteria, and individual mutation based on adaptive probability. To address the issue of low conversion efficiency in existing polarity conversion approaches, we introduce a fast polarity conversion algorithm (FPCA). Moreover, we present an MPRM circuits area optimization approach that uses the FPCA and WAA-BFA to search for the best polarity corresponding to the minimum circuits area. Experimental results demonstrate that the proposed MPRM circuits area optimization approach is effective and can be used as a promising EDA tool.
- Area optimization,
- Combinatorial optimization problem,
- Fast polarity conversion algorithm,
- Mixed polarity Reed-Muller,
- Bacterial foraging algorithm

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References(45)

References

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