Kunming Yang, Yingmei Chen, Zhixin Gu, et al., “A 10-gb/s inductorless burst-mode TIA with 5.5-ns reconfiguration time with a 250-ff avalanche photodiode,” Chinese Journal of Electronics, vol. x, no. x, pp. 1–13, xxxx. DOI: 10.23919/cje.2025.00.050
Citation: Kunming Yang, Yingmei Chen, Zhixin Gu, et al., “A 10-gb/s inductorless burst-mode TIA with 5.5-ns reconfiguration time with a 250-ff avalanche photodiode,” Chinese Journal of Electronics, vol. x, no. x, pp. 1–13, xxxx. DOI: 10.23919/cje.2025.00.050

A 10-Gb/s Inductorless Burst-Mode TIA With 5.5-ns Reconfiguration Time With a 250-fF Avalanche Photodiode

  • We present a inductorless burst-mode receiver (BMRx) whose architecture and design is optimized for linear operation up to 10 Gb/s modulation rates. The incorporation of a transimpedance amplifier (TIA) alongside a variable gain amplifier (VGA) topology facilitates linear modulation operation. In burst mode, the Pre-Reconfiguration Logical is based on 4bit-ADC and DAC. With the help of external control signals, The gain of the amplifier stages and dc-offsets of the datapath can be quickly adjusted from one burst to the next. To address the limitation of inductance, a inverter-based transimpedance amplifier is employed to expand the front-end bandwidth, while the VGA without inductance in the back-end introduces additional zeros to further enhance system bandwidth. We achieve 10 Gb/s operation with a 250 fF avalanche photodiode (APD) using 28nm CMOS technology. The bandwidth is 8.54 GHz, the transimpedance gain is 80 dB, the average input-referred noise current is 10.4 \rm pA/\sqrtHz , the reconfiguration time is a mere 5.5 ns, and the average sensitivity is -28.5 dBm at a BER of 1E-3. The burst mode TIA chip takes up 0.74 mm2.
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