TAN Mingxing, LIU Xianhua, ZHANG Jiyu, et al., “Compiler-Assisted Value Correlation for Indirect Branch Prediction,” Chinese Journal of Electronics, vol. 21, no. 3, pp. 414-418, 2012,
Citation:
TAN Mingxing, LIU Xianhua, ZHANG Jiyu, et al., “Compiler-Assisted Value Correlation for Indirect Branch Prediction,” Chinese Journal of Electronics, vol. 21, no. 3, pp. 414-418, 2012,
TAN Mingxing, LIU Xianhua, ZHANG Jiyu, et al., “Compiler-Assisted Value Correlation for Indirect Branch Prediction,” Chinese Journal of Electronics, vol. 21, no. 3, pp. 414-418, 2012,
Citation:
TAN Mingxing, LIU Xianhua, ZHANG Jiyu, et al., “Compiler-Assisted Value Correlation for Indirect Branch Prediction,” Chinese Journal of Electronics, vol. 21, no. 3, pp. 414-418, 2012,
Indirect branch prediction is important to boost instruction-level parallelism in modern processors. Previous indirect branch predictions usually cannot achieve high performance for the ineffectiveness of correlated information. This paper proposes the Compilerassisted value correlation (CVC), a hardware/software cooperative indirect branch prediction scheme. The key is to identify effective value correlation based on program substructures. A compiler algorithm is introduced to identify the effective value correlation based on three program substructures: virtual function calls, switch-case statements and function pointer calls. The compiler-identified value correlation is transferred to the dynamic predictor by extending the instruction set architecture. At runtime, the processor relies on a low-complexity Correlated value buffer (CVB) to maintain the compiler-identified value correlation and to guide the target address prediction for those indirect branch instructions. Our evaluations show that CVC prediction can significantly improve the performance with little extra hardware support over the traditional BTB predictor and the state-of-the-art VBBI prediction.