WANG Yu, LUO Hong, HE Ku, LUO Rong, YANG Huazhong, XIE Yuan. NBTI-aware Dual Vth Assignment for Leakage Reduction and Lifetime Assurance[J]. Chinese Journal of Electronics, 2009, 18(2): 225-230.
Citation: WANG Yu, LUO Hong, HE Ku, LUO Rong, YANG Huazhong, XIE Yuan. NBTI-aware Dual Vth Assignment for Leakage Reduction and Lifetime Assurance[J]. Chinese Journal of Electronics, 2009, 18(2): 225-230.

NBTI-aware Dual Vth Assignment for Leakage Reduction and Lifetime Assurance

  • Received Date: 2008-01-01
  • Rev Recd Date: 2008-08-01
  • Publish Date: 2009-05-25
  • Negative bias temperature instability(NBTI), which causes temporal performance degradationin digital circuits by affecting PMOS threshold voltage,has become the dominant circuit lifetime reliability factor.Design for lifetime reliability, especially for NBTI-inducedcircuit performance degradation, is emerging as one of themajor design concerns. In this paper, an NBTI-aware dualVth assignment is for the first time proposed to simultaneously reduce the circuit leakage current and ensure thecircuit lifetime requirement. Our experimental results onISCAS85 benchmark show that the NBTI-aware dual Vthassignment not only assigns more high Vth gates in the ISCAD85 circuits and leads to up to 14.88% (average 3.46%)further leakage saving under 5% circuit performance relaxation, but also brings different optimal high Vth (on average11mV higher) without performance relaxation.
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      沈阳化工大学材料科学与工程学院 沈阳 110142

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