GUO Wei, WEI Jizeng, MA Zijiao, WANG Zhenghua and LIU Zhuangli. Hybrid System Level Modeling andImplementation of Con¯gurable Processorfor SoC[J]. Chinese Journal of Electronics, 2010, 19(2): 237-240.
Citation: GUO Wei, WEI Jizeng, MA Zijiao, WANG Zhenghua and LIU Zhuangli. Hybrid System Level Modeling andImplementation of Con¯gurable Processorfor SoC[J]. Chinese Journal of Electronics, 2010, 19(2): 237-240.

Hybrid System Level Modeling andImplementation of Con¯gurable Processorfor SoC

  • Received Date: 2009-06-25
  • Rev Recd Date: 2009-09-01
  • Publish Date: 2010-04-05
  • To cope with the roaring complexity of
    modern SoC designs, system level modeling and simula-
    tion are recognized as a must to ful¯ll quick architecture
    exploration and hardware/software co-veri¯cation. A hy-
    brid system level modeling method for con¯gurable pro-
    cessor based on Transport triggered architecture (TTA) is
    presented in this paper. We implemented a cycle-accurate
    and bit-accurate model at instruction set simulation level
    using SystemC to achieve fast simulation and a transaction
    level model for standard IP interface for easy SoC integra-
    tion. The object oriented modeling technique was used to
    cope with the change of the architecture con¯guration. As
    a case study, an enhanced TTA-like processor, Tcore, was
    designed and plugged into a SoC for system simulation.
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      沈阳化工大学材料科学与工程学院 沈阳 110142

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