Micro System Design Based on Digital ADC andFPGA for Super-Slow Spectrum Analysis
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Graphical Abstract
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Abstract
The super-slow spectrum (3S, 0mHz »
40mHz) be the important feature of neurotransmitters in
slow synaptic transmissions for brain cognition function.
3S analysis focuses on the near infrared (940nm) otopoints
(mapping prefrontal cortex and temporal lobe) data in high
validity for such as lie detection. The goal is to design 3S
analysis micro system based on digital ADC and FPGA.
My ideas are in voltage-controlled oscillator (not gate chain
or Schmitt trigger) for digital ADC and in state machine
and embedded RAM with Cyclone EP1C6 FPGA. The db4
order-10 low frequency wavelet algorithm was hardened
into this FPGA. The validity results touched 87% for lie
test and 80% for smile test. This work may lay a prelimi-
nary foundation for neurotransmitter measurement SoC.
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