CHEN Jie, TONG Dong, LI Xianfeng, XIE Jingsong, WANG Keyi, CHENG Xu. Slice Analysis Based Bayesian Power Model forSequential Circuits[J]. Chinese Journal of Electronics, 2010, 19(1): 107-112.
Citation: CHEN Jie, TONG Dong, LI Xianfeng, XIE Jingsong, WANG Keyi, CHENG Xu. Slice Analysis Based Bayesian Power Model forSequential Circuits[J]. Chinese Journal of Electronics, 2010, 19(1): 107-112.

Slice Analysis Based Bayesian Power Model forSequential Circuits

  • Received Date: 1900-01-01
  • Rev Recd Date: 1900-01-01
  • Publish Date: 2010-01-05
  • Bayesian modeling method and slice anal-
    ysis techniques show good e®ect in cycle-accurate power
    analysis of combinational circuit. In this paper, we use vir-
    tual signal logical depth assignment to resolve the problem
    that signal loop can not be sliced in sequential circuits.
    With this method, we build cycle-accurate power model
    based on Bayesian inference and slice analysis techniques.
    The experiments on ISCAS89 benchmark show that the
    power-per-cycle estimation error is 6.7%. By analyzing the
    relation between error trend under di®erent slices and cir-
    cuit's size, we also build a thumb rule about how to choose
    best slice number: when the accumulative gate number
    is about 73% of total gate number, the model error with
    slice-based parameters usually arrives minimum value.
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      沈阳化工大学材料科学与工程学院 沈阳 110142

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