An Ultra Low Steady-State Current Power-on- Reset Circuit in 65nm CMOS Technology

A novel Power-on-reset (POR) circuit is proposed with ultra-low steady-state current consumption. A band-gap voltage comparator is used to generate a stable pull-up voltage. To eliminate the large current consumptions of the analog part, a power switch is adopted to cut the supply of band-gap voltage comparator, which gained ultra-low current consumption in steady-state after the POR rest process completed. The state of POR circuit is maintained through a state latch circuit. The whole circuit was designed and implemented in 65nm CMOS technology with an active area of 120μm*160μm. Experimental results show that it has a steady pull-up voltage of 0.69V and a brown-out voltage of 0.49V under a 1.2V supply voltage rising from 0V, plus its steady-state current is only 9nA. The proposed circuit is suitable to be integrated in system on chip to provide a reliable POR signal.