Research of E±cient Utilization RoutingAlgorithm for Current FPGA
-
Graphical Abstract
-
Abstract
Current FPGAs contain routing resources
of di®erent lengths and connectivity, and the connection re-
lation of which are described by hierarchical General rout-
ing matrix (GRM). In this paper, we present a practical
routing algorithm which can represent the complex driv-
ing relationships contained in GRMs and utilize routing
resources more e±cient for GRM based FPGAs. First, we
build Routing resource graph (RRG) by a bottom-up way,
then employ A* directed search algorithm while dynam-
ically updating the base cost of routing resource nodes,
so that the utilization rate of routing resources can be en-
hanced, and this routing algorithm has high-adaptability to
latest FPGA architectures. The experiment result shows
that the utilization rate of hex lines and long lines has been
raised by 6% and 8% respectively.
-
-
DownLoad: