A 25kHz-BW 98.6 dB-SNR Multi-Bit Delta-Sigma Modulator With Data-Weighted Averaging

This paper presents a high-precision Delta-Sigma Modulator (DSM) for audio applications. The modulator is implemented by cascade of integrators with feedback (CIFB) with 3rd-order noise shaping and 4-bit quantization, guaranteeing the modulator stability, limiting the oversampling ratio (OSR) to 64, and greatly relaxing the integrator amplifier design. First-order data-weighted averaging (DWA) technique is included to suppress harmonic distortion introduced by cell mismatch of multi-bit capacitive digital-to-analog converter (CDAC). Fabricated in a 0.18 μm CMOS process, the DSM test chip achieves a signal-to-noise ratio (SNR) of 98.6 dB, a signal-to-noise-plus-distortion ratio (SNDR) of 91.5 dB for 25-kHz bandwidth. The modulator consumes 12.38 mW power from 3.3 V supplies, corresponding to a competitive FoM of 154.6 dB.