YANG Liqun, YANG Haigang, LI Wei, LI Zhihua. Efficiently Exploring FPGA Design Space Based on Semi-Supervised Learning[J]. Chinese Journal of Electronics, 2016, 25(1): 58-63. doi: 10.1049/cje.2016.01.009
Citation: YANG Liqun, YANG Haigang, LI Wei, LI Zhihua. Efficiently Exploring FPGA Design Space Based on Semi-Supervised Learning[J]. Chinese Journal of Electronics, 2016, 25(1): 58-63. doi: 10.1049/cje.2016.01.009

Efficiently Exploring FPGA Design Space Based on Semi-Supervised Learning

doi: 10.1049/cje.2016.01.009
Funds:  This work is supported by National Natural Science Foundation of China (No.61271149) and National Science and Technology Major Project of China (No.2013ZX03006004).
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  • Corresponding author: YANG Haigang (corresponding author) received B.Sc. and M.Sc. degrees from Fudan University, China in 1983 and 1986, respectively, and the Ph.D. degree from University of Cambridge, United Kingdom in 1991. He had previously been working with Wolfson Micro-electronics, LSI Logic Europe, Hitachi Microsystems Europe and Altera Europe. He currently works with Institute of Electronics, Chinese Academy of Sciences, as professor and director of the Systemon- Programmable Chip Research Department. His main research interests include analog and mixed signal integrated circuit design, VLSI design, etc. (Email: yanghg@mail.ie.ac.cn)
  • Received Date: 2014-01-27
  • Rev Recd Date: 2014-06-30
  • Publish Date: 2016-01-10
  • Design space exploration (DSE) is an important step before the physical level design of Field programmable gate arrays (FPGA). An optimum architecture is usually selected from the whole space. As the architecture parameters increase, the huge time cost to explore an exponentially increasing space makes this method unrealistic. We propose a novel predictive modeling approach called ECOMT to estimate the area and delay of a circuit which is mapped onto an FPGA with certain architecture. Semi-supervised model tree is adopted to model the performance with respect to architecture parameters. Combined with nonlinear programming, the area and delay model obtained can be used to guide the DSE. Experimental results show that the model trained through ECOMT has Mean relative error (MRE) below 5% compared to VTR. Meanwhile the time used to attain the model is less than 3 minutes, which reduces the time of DSE considerably.
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