WANG Deming, HU Jianguo, WANG Jianhui, et al., “VLSI Implementation of Area and Power Efficient Digital Control Circuit for HF RFID Tag Chip,” Chinese Journal of Electronics, vol. 29, no. 1, pp. 82-88, 2020, doi: 10.1049/cje.2019.10.003
Citation: WANG Deming, HU Jianguo, WANG Jianhui, et al., “VLSI Implementation of Area and Power Efficient Digital Control Circuit for HF RFID Tag Chip,” Chinese Journal of Electronics, vol. 29, no. 1, pp. 82-88, 2020, doi: 10.1049/cje.2019.10.003

VLSI Implementation of Area and Power Efficient Digital Control Circuit for HF RFID Tag Chip

doi: 10.1049/cje.2019.10.003
Funds:  This work is supported by the Project of Young Innovative Talents of Guangdong Province (No.8S0185), the Research and Development Projects in the Key Areas of Guangdong Province (No.2019B010142002), and the 2016 Guangzhou Innovation and Entrepreneurship Leader Team (No.CXLJTD-201608).
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  • Corresponding author: HU Jianguo (corresponding author) received the B.S. and M.S. degrees in National University of Defense Technology, in 2000 and 2004, respectively, and Ph.D. degree in communication and information systems, School of Information Science and Technology, Sun Yat-sen University, Guangzhou, China, in 2010. He is currently a professor with the Sun Yatsen University. And he is also the director of Development Research Institute of Guangzhou Smart City. He is a Scientific and Technological Innovation Leader of the Guangdong Special Branch Project. He is also an Innovative Team Leader in Guangzhou City. Professor Hu has either authored or co-authored over 30 technical papers. He holds over 100 Chinese patents. His research interests include mixed-signal ICs, RFID, Internet of things and artificial intelligence. (Email:hujguo@mail.sysu.edu.cn)
  • Received Date: 2019-05-09
  • Rev Recd Date: 2019-07-04
  • Publish Date: 2020-01-10
  • A fully integrated area efficient digital control circuit based on the ISO/IEC 15693 protocol is proposed for high frequency RFID tag chip. The proposed circuit is mainly composed of pulse position modulation decoder, Manchester encoder, anticonllision, low power circuit and other control logic. It supports six different data rates, namely, low or high data rate with one subcarrier (6.62 or 26.48 Kbit/s), low or high data rate with two subcarriers (6.67 or 26.69 Kbit/s), fast data rate with one subcarrier (13.24 or 52.97 Kbit/s). The proposed digital control circuit was integrated in an RFID tag IC and was fabricated using a 0.18-μm 2P6M CMOS process with an area of 306μm by 326μm which is smaller than the existing designs. Besides of small area, the circuit has an advantage of low power with a power consumption of less than 50μW.
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