JIAO Chao, YU Zhiping. A Novel GGNMOS Macro-Model for ESD Circuit Simulation[J]. Chinese Journal of Electronics, 2009, 18(4): 630-634.
Citation: JIAO Chao, YU Zhiping. A Novel GGNMOS Macro-Model for ESD Circuit Simulation[J]. Chinese Journal of Electronics, 2009, 18(4): 630-634.

A Novel GGNMOS Macro-Model for ESD Circuit Simulation

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  • Received Date: December 31, 2007
  • Revised Date: April 30, 2009
  • Published Date: November 24, 2009
  • A novel macro-model for ESD circuit simulation with only five fitting parameters is proposed. Inthis model a new topology and a new multiplication factorequation are proposed as well as the extracting method.This modeling approach greatly reduces time and effortrequired for circuit design while making use of GGNMOS(Gate-grounded NMOS) as ESD (Electrostatic discharge)protection, which is widely used for integrated circuitsto protect IOs and power rails. The DC characteristicsof GGNMOS and transient behavior of GGNMOS underHBM (Human body model) stress are simulated using bothour macro-model and two-dimensional device simulator,Taurus (Synopsys). Good agreement has been obtained.

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