Kunming Yang, Yingmei Chen, Zhixin Gu, et al., “A 10-Gb/s inductorless burst-mode TIA with 5.5-ns reconfiguration time with a 250-fF avalanche photodiode,” Chinese Journal of Electronics, vol. 35, no. 1, pp. 1–13, 2026. DOI: 10.23919/cje.2025.00.050
Citation: Kunming Yang, Yingmei Chen, Zhixin Gu, et al., “A 10-Gb/s inductorless burst-mode TIA with 5.5-ns reconfiguration time with a 250-fF avalanche photodiode,” Chinese Journal of Electronics, vol. 35, no. 1, pp. 1–13, 2026. DOI: 10.23919/cje.2025.00.050

A 10-Gb/s Inductorless Burst-Mode TIA with 5.5-ns Reconfiguration Time with a 250-fF Avalanche Photodiode

  • We present a inductorless burst-mode receiver whose architecture and design is optimized for linear operation up to 10-Gb/s modulation rates. The incorporation of a transimpedance amplifier (TIA) alongside a variable gain amplifier (VGA) topology facilitates linear modulation operation. In burst mode, the Pre-Reconfiguration Logical is based on 4-bit analog-to-digital converter and digital-to-analog converter. With the help of external control signals, the gain of the amplifier stages and dc-offsets of the datapath can be quickly adjusted from one burst to the next. To address the limitation of inductance, a inverter-based transimpedance amplifier is employed to expand the front-end bandwidth, while the VGA without inductance in the back-end introduces additional zeros to further enhance system bandwidth. We achieve 10-Gb/s operation with a 250-fF avalanche photodiode (APD) using 28-nm complementary metal oxide semiconductor technology. The bandwidth is 8.54-GHz, the transimpedance gain is 80-dB, the average input-referred noise current is 10.4-\rm pA/\sqrtHz , the reconfiguration time is a mere 5.5-ns, and the average sensitivity is −28.5-dBm at a BER of 1\times10^-3 . The burst mode TIA chip takes up 0.74-mm2.
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