TANG Wenyi, JIA Song, WANG Yuan. Dual-Voltage Single-Rail Dynamic DPA-Resistant Logic Based on Charge Sharing Mechanism[J]. Chinese Journal of Electronics, 2017, 26(5): 899-904. doi: 10.1049/cje.2017.03.003
Citation: TANG Wenyi, JIA Song, WANG Yuan. Dual-Voltage Single-Rail Dynamic DPA-Resistant Logic Based on Charge Sharing Mechanism[J]. Chinese Journal of Electronics, 2017, 26(5): 899-904. doi: 10.1049/cje.2017.03.003

Dual-Voltage Single-Rail Dynamic DPA-Resistant Logic Based on Charge Sharing Mechanism

doi: 10.1049/cje.2017.03.003
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  • Corresponding author: JIA Song (corresponding author) was born in 1970. He received the Ph.D. degree in microelectronics from Peking University in 2003. He joined the EECS faculty at Peking University in 2003. He has been employed as associate professor at PKU since 2003. His research interests include digital VLSI design with particular emphasis in low power and high speed CMOS circuits. (Email:jias@pku.edu.cn)
  • Received Date: 2015-05-11
  • Rev Recd Date: 2015-08-26
  • Publish Date: 2017-09-10
  • Differential power analysis (DPA) has become a major system security concern. To achieve high levels of security with low power and die area costs, a novel Dual-voltage single-rail dynamic logic (DSDL) design is proposed. The proposed scheme can reduce power dissipation and obtain extremely well-balanced power consumption. The charge sharing mechanism is used for voltage transfer in the internal nodes during the evaluation of the design. Dual power supply voltages are used with positive feedback to speed up the evaluation process. A 4-bit micro Substitution box (SBOX) of the Advanced encryption standard (AES) algorithm has been implemented to verify the security of the proposed logic design. The experimental results proved the security and the efficiency of the proposed DSDL, which can reduce power dissipation by up to 20% and occupies at most 83% of the silicon area when compared with previous state-of-the-art countermeasures.
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